The characteristics of contemporary processors, input, output and storage devices — OCR A-Level Computer Science Revision

    This topic covers the internal architecture of contemporary processors, including the roles of the ALU, Control Unit, and registers within the Fetch-Decode

    Topic Synopsis

    This topic covers the internal architecture of contemporary processors, including the roles of the ALU, Control Unit, and registers within the Fetch-Decode-Execute cycle. It also examines factors influencing CPU performance, different processor architectures (Von Neumann, Harvard, CISC, RISC), and the application of various input, output, and storage devices.

    Key Concepts & Core Principles

    Exam Tips & Revision Strategies

    Common Misconceptions & Mistakes to Avoid

    Examiner Marking Points

    The characteristics of contemporary processors, input, output and storage devices

    OCR
    A-Level

    This topic covers the internal architecture of contemporary processors, including the roles of the ALU, Control Unit, and registers within the Fetch-Decode-Execute cycle. It also examines factors influencing CPU performance, different processor architectures (Von Neumann, Harvard, CISC, RISC), and the application of various input, output, and storage devices.

    0
    Objectives
    4
    Exam Tips
    5
    Pitfalls
    0
    Key Terms
    11
    Mark Points

    Topic Overview

    This topic explores the fundamental components of modern computer systems, focusing on the characteristics of contemporary processors, input/output devices, and storage technologies. You'll learn how processors execute instructions using the fetch-decode-execute cycle, the role of cache memory and pipelining, and how different architectures like RISC and CISC impact performance. Understanding these concepts is crucial for grasping how hardware and software interact to deliver efficient computing.

    Input and output devices are the bridge between users and the machine, while storage devices determine how data is retained long-term. You'll examine various types of storage—magnetic, optical, solid-state—and their trade-offs in speed, capacity, and cost. This knowledge is essential for designing systems that meet specific performance and reliability requirements, whether for a gaming PC or a server farm.

    In the wider OCR A-Level Computer Science syllabus, this topic underpins modules on computer organisation, data representation, and system software. Mastery here will help you tackle more advanced subjects like operating systems, networking, and the impact of emerging technologies. It's also directly relevant to exam questions that ask you to compare architectures or justify storage choices in real-world scenarios.

    Key Concepts

    Core ideas you must understand for this topic

    • →The fetch-decode-execute cycle: the fundamental process by which a CPU retrieves an instruction from memory, decodes it, and executes it using the ALU and control unit.
    • →Pipelining: a technique where multiple instructions are overlapped in execution, improving throughput by dividing the fetch, decode, and execute stages into separate steps.
    • →RISC vs CISC architectures: RISC uses simple, fixed-length instructions for faster execution, while CISC uses complex, variable-length instructions to reduce program size.
    • →Cache memory: small, fast memory located close to the CPU that stores frequently used data and instructions to reduce access time; levels L1, L2, L3.
    • →Types of storage: magnetic (HDD), optical (CD/DVD/Blu-ray), and solid-state (SSD, flash) with trade-offs in speed, durability, capacity, and cost.

    What You Need to Demonstrate

    Key skills and knowledge for this topic

    • Functions of the ALU, Control Unit, and specific registers (PC, ACC, MAR, MDR, CIR).
    • The role of data, address, and control buses in relation to assembly language.
    • The stages of the Fetch-Decode-Execute cycle and register effects.
    • Factors affecting CPU performance: clock speed, number of cores, and cache.
    • The purpose and benefits of pipelining.
    • Distinctions between Von Neumann and Harvard architectures.
    • Differences between CISC and RISC processors.
    • The role of GPUs in general-purpose processing.

    Marking Points

    Key points examiners look for in your answers

    • Functions of the ALU, Control Unit, and specific registers (PC, ACC, MAR, MDR, CIR).
    • The role of data, address, and control buses in relation to assembly language.
    • The stages of the Fetch-Decode-Execute cycle and register effects.
    • Factors affecting CPU performance: clock speed, number of cores, and cache.
    • The purpose and benefits of pipelining.
    • Distinctions between Von Neumann and Harvard architectures.
    • Differences between CISC and RISC processors.
    • The role of GPUs in general-purpose processing.
    • Characteristics and uses of magnetic, flash, and optical storage.
    • Distinctions between RAM and ROM.
    • The concept and purpose of virtual storage.

    Examiner Tips

    Expert advice for maximising your marks

    • 💡Be prepared to trace the contents of registers during the Fetch-Decode-Execute cycle.
    • 💡When discussing CPU performance, always link factors like cache or clock speed to the efficiency of the FDE cycle.
    • 💡Use specific examples of storage devices (e.g., SSD vs HDD) when asked to justify their application to a problem.
    • 💡Ensure you can clearly distinguish between the roles of the control bus, address bus, and data bus.
    • 💡When comparing architectures, always mention specific characteristics like instruction set size, addressing modes, and power consumption. Use examples (e.g., ARM for RISC, x86 for CISC) to show real-world application.
    • 💡In questions about storage, justify your choice by linking to the scenario: for a server needing high capacity and reliability, recommend RAID with HDDs; for a laptop requiring speed and portability, recommend an SSD.
    • 💡For processor performance, discuss factors beyond clock speed: cache size, number of cores, pipeline depth, and branch prediction. Show understanding of trade-offs, not just memorised facts.

    Common Mistakes

    Pitfalls to avoid in your exam answers

    • Confusing the roles of the MAR and MDR during the Fetch-Decode-Execute cycle.
    • Failing to explain how bus width or type affects data transfer.
    • Misunderstanding the difference between Von Neumann and Harvard architectures.
    • Assuming GPUs are only used for graphics rendering.
    • Confusing the characteristics of volatile (RAM) and non-volatile (ROM/Storage) memory.
    • Misconception: More cores always mean faster performance. Correction: Performance gains depend on software being parallelised; many tasks are single-threaded and won't benefit from multiple cores.
    • Misconception: Cache memory is the same as RAM. Correction: Cache is much faster but smaller and more expensive; it stores copies of frequently used data from RAM to speed up access.
    • Misconception: SSDs are always better than HDDs. Correction: While SSDs are faster and more durable, HDDs offer higher capacities at lower cost per gigabyte, making them suitable for bulk storage.

    Frequently Asked Questions

    Common questions students ask about this topic

    Before You Start

    Prior knowledge that will help with this topic

    • •Basic understanding of binary and hexadecimal number systems, as they are used in memory addressing and instruction encoding.
    • •Familiarity with logic gates and Boolean algebra, which underpin the ALU and control unit operations.
    • •Knowledge of the stored program concept (von Neumann architecture) to appreciate how instructions and data are held in memory.

    Likely Command Words

    How questions on this topic are typically asked

    Describe
    Explain
    Compare
    Justify
    Identify

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