AQA · A-Level · Physics

    Course version: 7408 · Version from Sept 2016

    The gates should be treated as building blocks. The internal structure or…

    Full specification wording

    Combinational logic (A-level only): The gates should be treated as building blocks. The internal structure or circuit of the gates is not required.

    In this topic, AND, OR, NOT, NAND, NOR and XOR gates are treated as indivisible building blocks with defined truth tables.

    Checked against the AQA 7408 specification (opens in a new tab) on .

    • Point 4 of 4
    • 4 key terms

    Study notes

    From the checked teaching notes for this specification point.

    The idea

    In this topic, AND, OR, NOT, NAND, NOR and XOR gates are treated as indivisible building blocks with defined truth tables. You use their input-output behaviour to build and analyse larger combinational circuits, without needing to know how each gate is made from transistors or other components. For example, a NAND gate is used simply as a two-input device whose output is 0 only when both inputs are 1; its internal transistor arrangement is outside the specification. This lets you focus on connecting gates correctly, reading and writing truth tables, and simplifying expressions, rather than on semiconductor physics. Assessment therefore targets circuit behaviour and logic, not gate construction.

    What earns the marks

    • Use the standard truth table of each gate as its definition when analysing or building circuits.
    • Treat each gate as a single functional block with defined inputs and outputs.
    • Combine gates by connecting the output of one to the input of another to form larger circuits.
    • Explain circuit behaviour in terms of gate functions rather than internal electronic components.
    • Recognise that questions on internal gate structure are outside the scope of this specification.

    Common mistakes and how to put them right

    • Attempting to describe transistor-level construction of a gate.

      Put it right by describing only the gate's truth table and function.

    • Confusing the truth table of one gate with another, such as NAND with NOR.

      Put it right by learning each gate's output for every input combination.

    • Treating a gate as having more inputs or outputs than its symbol shows.

      Put it right by using only the inputs and single output defined for that gate.

    Exam tips

    • Learn the truth tables of all standard gates so you can apply them quickly without deriving them.
    • When explaining a circuit, refer to gate names and their input-output behaviour rather than internal structure.
    • If a question asks for a circuit, use standard gate symbols and connect them clearly, showing inputs on the left and outputs on the right.

    Try the lesson

    The start of the Combinational logic (A-level only): The gates should be treated as building blocks. The internal structure or circuit of the gates is not required. lesson, made from checked teaching notes for this specification point.

    Have a go first

    A logic circuit is constructed using standard logic gates as building blocks. The circuit must produce an output of 1 if and only if input A is 1 and input B is 0. Which arrangement of gates provides this function?

    Listen

    In this topic, AND, OR, NOT, NAND, NOR and XOR gates are treated as indivisible building blocks with defined truth tables. You use their input-output behaviour to build and analyse larger combinational circuits, without needing to know how each gate is made from transistors or other components. For example, a NAND gate is used simply as a two-input device whose output is 0 only when both inputs are 1; its internal transistor arrangement is outside the specification. This lets you focus on connecting gates correctly, reading and writing truth tables, and simplifying expressions, rather than on semiconductor physics. Assessment therefore targets circuit behaviour and logic, not gate construction. A strong answer earns marks for these points. Use the standard truth table of each gate as its definition when analysing or building circuits. Treat each gate as a single functional block with defined inputs and outputs. Combine gates by connecting the output of one to the input of another to form larger circuits. Explain circuit behaviour in terms of gate functions rather than internal electronic components. A common slip: Attempting to describe transistor-level construction of a gate. Instead, describing only the gate's truth table and function. Exam tip: Learn the truth tables of all standard gates so you can apply them quickly without deriving them.

    See it

    A top-down flowchart with seven nodes. The first node lists the standard logic gates: AND, OR, NOT, NAND, NOR and XOR. An arrow leads to a node saying each gate is treated as a single functional block. The next node says the standard truth table of each gate is used as its definition. An arrow then leads to a node saying the output of one gate is connected to the input of another. The next node says this forms larger combinational circuits. An arrow leads to a node saying circuit behaviour is explained in terms of gate functions. The final node states that the internal structure or circuit of the gates is not required.
    It shows how the standard logic gates are treated as building blocks, defined by their truth tables, combined into larger circuits and explained by gate function rather than internal structure.

    Put it in order

    Put these steps in the order they happen.

    1. 1. Internal structure or circuit of the gates is not required
    2. 2. Explain circuit behaviour in terms of gate functions
    3. 3. Use the standard truth table of each gate as its definition
    4. 4. Form larger combinational circuits
    5. 5. Standard logic gates: AND, OR, NOT, NAND, NOR, XOR
    6. 6. Treat each gate as a single functional block
    7. 7. Connect the output of one gate to the input of another

    Key words

    Say what each word means before you turn the card.

    Gates as functional building blocks

    Try answering aloud or in your head before turning the card.

    Standard truth tables of logic gates

    Try answering aloud or in your head before turning the card.

    Combinational circuit construction

    Try answering aloud or in your head before turning the card.

    Scope of the specification

    Try answering aloud or in your head before turning the card.

    See every definition
    Gates as functional building blocks
    Each gate is treated as a single functional block with defined inputs and outputs, and its internal structure or circuit is not required.
    Standard truth tables of logic gates
    The standard truth table of each gate is used as its definition when analysing or building circuits.
    Combinational circuit construction
    Gates are combined by connecting the output of one to the input of another to form larger circuits.
    Scope of the specification
    Questions on internal gate structure are outside the scope of this specification.

    Label the diagram

    Some boxes have lost their names. Pick the right name for each number.

    The diagram again, with 3 boxes numbered instead of named. A top-down flowchart with seven nodes. The first node lists the standard logic gates: AND, OR, NOT, NAND, NOR and XOR. An arrow leads to a node saying each gate is treated as a single functional block. The next node says the standard truth table of each gate is used as its definition. An arrow then leads to a node saying the output of one gate is connected to the input of another. The next node says this forms larger combinational circuits. An arrow leads to a node saying circuit behaviour is explained in terms of gate functions. The final node states that the internal structure or circuit of the gates is not required.

    • 1Box 1

    • 2Box 2

    • 3Box 3

    0 of 3 labelled

    There is more to this lesson

    The full lesson goes on to check your understanding and help you earn the marks. Create a free account to carry on, with your progress saved.

    Carry on with the full lesson

    A week of Premium from your first lesson · Then the free plan continues · No card, no charge

    Test your understanding of Combinational logic (A-level only): The gates should be treated as building blocks. The internal structure or circuit of the gates is not required.

    Active recall beats re-reading. Take an instant quiz now to test what you’ve learned and lock it into long-term memory.

    Take topic quiz

    A week of Premium from your first lesson · Then the free plan continues · No card, no charge

    Start free

    Cookies on MasteryMind

    Essential cookies keep you signed in.

    Analytics and advertising cookies stay off unless you accept.

    Read our Privacy Policy.