AQA · A-Level · Physics

    Course version: 7408 · Version from Sept 2016

    The gates should be treated as building blocks. The internal structure or…

    Full specification wording

    Sequential logic (A-level only): The gates should be treated as building blocks. The internal structure or circuit of the gates is not required.

    Logic gates are studied as functional blocks: you need to know what each gate outputs for given inputs, and how gates combine into larger systems, but not how transistors inside a gate are arranged.

    Checked against the AQA 7408 specification (opens in a new tab) on .

    • Point 5 of 5
    • 4 key terms

    Study notes

    From the checked teaching notes for this specification point.

    The idea

    Logic gates are studied as functional blocks: you need to know what each gate outputs for given inputs, and how gates combine into larger systems, but not how transistors inside a gate are arranged. Treat a gate as a black box with defined behaviour. For example, a two-input AND gate outputs 1 only when both inputs are 1; a NOT gate inverts its single input. You use these blocks to build truth tables, combine gates into circuits, and analyse sequential systems such as latches and flip-flops. Assessment focuses on correct input-output behaviour, truth tables, Boolean expressions and circuit analysis, not on internal transistor-level construction.

    What earns the marks

    • State the output of each basic gate (NOT, AND, OR, NAND, NOR, XOR) for all input combinations.
    • Construct and complete truth tables for circuits containing several gates.
    • Derive or interpret a Boolean expression from a gate network.
    • Combine gates as building blocks to realise a required logic function.
    • Analyse sequential circuits by treating each gate as a block with defined behaviour.

    Common mistakes and how to put them right

    • Attempting to explain gate operation using internal transistor arrangements.

      Put it right: Describe only the input-output relationship of the gate.

    • Confusing NAND with AND or NOR with OR; the correction is to remember that NAND and NOR are the inverted forms of AND and OR respectively.

    • Assuming a gate output depends on past inputs.

      Put it right: Treat combinational gates as responding only to their present inputs.

    Exam tips

    • Write a truth table with every input combination before deducing any output.
    • Label intermediate nodes in a multi-gate circuit so each gate's output is tracked clearly.
    • Check the final output against the Boolean expression you have written to confirm consistency.

    Try the lesson

    The start of the Sequential logic (A-level only): The gates should be treated as building blocks. The internal structure or circuit of the gates is not required. lesson, made from checked teaching notes for this specification point.

    Have a go first

    A simple sequential logic circuit is created by connecting the output of a standard OR gate back to one of its two inputs. The other input is labelled X. Initially, X is at logic 0 and the output of the gate is at logic 0.

    What happens to the output if X briefly changes to logic 1 and then returns to logic 0?

    Listen

    Logic gates are studied as functional blocks: you need to know what each gate outputs for given inputs, and how gates combine into larger systems, but not how transistors inside a gate are arranged. Treat a gate as a black box with defined behaviour. For example, a two-input AND gate outputs 1 only when both inputs are 1; a NOT gate inverts its single input. You use these blocks to build truth tables, combine gates into circuits, and analyse sequential systems such as latches and flip-flops. Assessment focuses on correct input-output behaviour, truth tables, Boolean expressions and circuit analysis, not on internal transistor-level construction. A strong answer earns marks for these points. State the output of each basic gate (NOT, AND, OR, NAND, NOR, XOR) for all input combinations. Construct and complete truth tables for circuits containing several gates. Derive or interpret a Boolean expression from a gate network. Combine gates as building blocks to realise a required logic function. A common slip: Attempting to explain gate operation using internal transistor arrangements. Instead, describe only the input-output relationship of the gate. Exam tip: Write a truth table with every input combination before deducing any output.

    See it

    A top-down flowchart. The top node reads 'Logic gates treated as building blocks'. Three arrows lead from it to three nodes: 'Know output of each gate for given inputs', 'Combine gates into larger systems', and 'No internal structure or circuit required'. From 'Know output of each gate for given inputs' an arrow leads to 'Build truth tables'. From 'Combine gates into larger systems' an arrow leads to 'Analyse sequential systems such as latches and flip-flops'. Both 'Build truth tables' and 'Analyse sequential systems such as latches and flip-flops' lead to 'Derive or interpret Boolean expressions', which leads to a final node 'Circuit analysis'.
    It shows how treating logic gates as building blocks leads to knowing their input-output behaviour, combining them, and analysing circuits without reference to internal structure.

    Key words

    Say what each word means before you turn the card.

    Truth tables

    Try answering aloud or in your head before turning the card.

    Boolean expression

    Try answering aloud or in your head before turning the card.

    Sequential circuits

    Try answering aloud or in your head before turning the card.

    Combinational gates

    Try answering aloud or in your head before turning the card.

    See every definition
    Truth tables
    Tables that list the output of each basic gate for all input combinations, and can be constructed and completed for circuits containing several gates.
    Boolean expression
    An expression that can be derived or interpreted from a gate network and checked against the final output for consistency.
    Sequential circuits
    Systems such as latches and flip-flops that are analysed by treating each gate as a block with defined behaviour.
    Combinational gates
    Gates that respond only to their present inputs and are not assumed to depend on past inputs.

    Label the diagram

    Some boxes have lost their names. Pick the right name for each number.

    The diagram again, with 3 boxes numbered instead of named. A top-down flowchart. The top node reads 'Logic gates treated as building blocks'. Three arrows lead from it to three nodes: 'Know output of each gate for given inputs', 'Combine gates into larger systems', and 'No internal structure or circuit required'. From 'Know output of each gate for given inputs' an arrow leads to 'Build truth tables'. From 'Combine gates into larger systems' an arrow leads to 'Analyse sequential systems such as latches and flip-flops'. Both 'Build truth tables' and 'Analyse sequential systems such as latches and flip-flops' lead to 'Derive or interpret Boolean expressions', which leads to a final node 'Circuit analysis'.
    • 1Box 1

    • 2Box 2

    • 3Box 3

    0 of 3 labelled

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