AQA · GCSE · Computer Science

    Course version: 8525 · Version from Sept 2020

    Systems architecture: bus.

    A bus is a set of parallel wires that carries data, addresses or control signals between components of a computer, such as the CPU, memory and input/output devices.

    Checked against the AQA 8525 specification (opens in a new tab) on .

    • Point 6 of 30

    Study notes

    From the checked teaching notes for this specification point.

    The idea

    A bus is a set of parallel wires that carries data, addresses or control signals between components of a computer, such as the CPU, memory and input/output devices. Because one bus is shared, only one transfer happens at a time, which is why bus width and clock speed affect performance. The three main types are the data bus, which carries the actual data or instruction; the address bus, which carries the location being accessed; and the control bus, which carries signals such as read, write and clock pulses. A wider data bus moves more bits per transfer, and a faster clock means more transfers per second. In a multiple-choice question you may be asked which bus carries a particular signal or how bus width affects performance, so match each bus to its job and remember that the address bus is one-directional from the CPU while the data bus is bidirectional.

    What earns the marks

    • A bus is a set of wires carrying signals between computer components.
    • The data bus carries data and instructions between the CPU and memory or devices.
    • The address bus carries the memory location being read from or written to.
    • The control bus carries control signals such as read, write and clock pulses.
    • Bus width and clock speed affect how much data can be transferred and how quickly.

    Common mistakes and how to put them right

    • Treating the data bus and address bus as interchangeable.

      Put it right by stating that the data bus carries the contents while the address bus carries the location.

    • Believing a bus carries several transfers at once.

      Put it right by explaining that a shared bus handles one transfer at a time.

    • Ignoring the control bus.

      Put it right by naming the read, write and clock signals it carries.

    Exam tips

    • Match each option to one of the three bus types before deciding.
    • Use the words 'data', 'address' and 'control' to check whether an option describes the right signal.
    • If an option mentions performance, check whether it correctly links bus width or clock speed to transfer rate.

    Try the lesson

    The start of the Systems architecture: bus. lesson, made from checked teaching notes for this specification point.

    Have a go first

    What is the function of a bus within a computer system?

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