Von Neumann architecture MAR (Memory Address Register) MDR (Memory Data…

The idea

Von Neumann architecture stores both program instructions and data in the same main memory, fetched and executed in a repeating cycle. The Program Counter holds the address of the next instruction; during the fetch stage its value is copied to the MAR, which sends that address along the address bus. The memory returns the instruction or data to the MDR via the data bus. The PC is then incremented so it points to the following instruction. The instruction is decoded and executed, and the Accumulator holds intermediate arithmetic and logic results inside the CPU. For example, adding two numbers may load one value into the Accumulator, add the second, and store the result back to memory. Together these registers coordinate the fetch-decode-execute cycle.

What earns the marks

• States that Von Neumann architecture uses a single shared main memory for both instructions and data.
• Describes the Program Counter as holding the address of the next instruction to be fetched.
• Explains that the MAR holds the address of the memory location currently being read from or written to.
• Explains that the MDR holds the data or instruction fetched from memory, or the data to be written to memory.
• Describes the Accumulator as a register that stores intermediate results of arithmetic and logic operations.
• Outlines the sequence: PC → MAR → memory → MDR → decode → execute, with the PC incremented during the fetch stage after the address is copied to the MAR.
• Uses correct register names and explains the role of each within the fetch-decode-execute cycle.

Common mistakes and how to put them right

• Confusing the MAR and MDR.

  Put it right: MAR = address, MDR = data.

• Thinking the Program Counter holds the instruction itself rather than its address.

  Put it right: The PC holds the address of the next instruction; the instruction is fetched into the MDR.

• Believing the Accumulator stores the address of the next instruction.

  Put it right: The Accumulator stores intermediate arithmetic or logic results, not addresses.

• Describing the fetch-decode-execute cycle in the wrong order, such as decoding before fetching.

  Put it right: Fetch the instruction, then decode it, then execute it.

• Placing the Program Counter increment after decode or execute.

  Put it right: The PC is incremented during the fetch stage, after its value has been copied to the MAR, so it points to the next instruction.

Exam tips

• When asked to describe the role of a register, name the register and state exactly what it holds, for example 'the MAR holds the address of the memory location being accessed'.
• For a sequencing question, write the steps in order and include the role of the PC, MAR, MDR and Accumulator where relevant; state that the PC increments during fetch.
• Use the terms 'address', 'data' and 'instruction' precisely; avoid saying 'the MAR holds the data' because that is the MDR's role.
• If a question asks about Von Neumann architecture, mention the shared memory for instructions and data as well as the registers.