The working memory model: central executive, phonological loop,…

The idea

Baddeley and Hitch (1974) replaced the single short-term box with a work space of three parts, later adding a fourth. The central executive directs attention and allocates tasks; it is modality-free and stores virtually nothing. The phonological loop codes sound, with a store holding what you hear and an articulatory process rehearsing roughly two seconds of speech. The visuo-spatial sketchpad codes visual and spatial information, holding three or four objects. The episodic buffer binds information, holds about four chunks, and links to long-term memory. Dual-task findings show two visual jobs at once interfere, but a visual and a verbal job do not. However, the central executive is described so vaguely that it cannot be tested.

What earns the marks

• Central executive described as a limited-capacity attentional controller that allocates the subsystems and is modality-free, holding virtually no material of its own.
• Phonological loop split into the phonological store and the articulatory process, coding acoustically, with about two seconds of capacity and the word-length effect as evidence.
• Visuo-spatial sketchpad described as coding visual and spatial information with a capacity of three to four objects.
• Episodic buffer described as a limited general store with a capacity of about four chunks that binds information from the other components and links it to long-term memory.
• Evaluation: dual-task studies, where two tasks competing for one subsystem impair each other and tasks in different subsystems do not.
• Evaluation: the central executive criticised as vague and unfalsifiable, or KF used to support separable short-term stores.

Common mistakes and how to put them right

• Listing the four components without their coding and capacity, which is exactly what the specification names as the features to know.

• Calling the central executive a store, when it directs attention and is modality-free, holding almost nothing.

• Treating this as a model of all memory rather than of short-term memory, which wrecks any comparison with the multi-store model.

• Saying dual-task studies 'prove' the model, when they support the separation of the subsystems and nothing more.

Exam tips

• In an application question, take each activity in the scenario, name the component it loads, and say why performance suffers or survives.
• A comparison with the multi-store model counts as evaluation only if you state what this model explains that the older one cannot.
• Quote the word-length effect or the articulatory suppression finding rather than asserting that the loop has limited capacity.