Physics A-Level
Timing diagram
What Timing diagram means in Physics A-Level, as defined for AQA.
Definition of Timing diagram
Check what you remember
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Reference: AQA
A drawing in which each clock pulse is labelled, the state of every flip-flop after each active edge is marked, and combinational gates are then evaluated.
Topics that use Timing diagram
- Sequential logic (A-level only) (AQA A-Level)
Related terms
- Asynchronous output changes
- Boolean expression
- Clock
- Clock-edge triggering
- Johnson counter
- Reset input
- Sequential logic circuits
- Truth tables
Using Timing diagram in the exam
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