Combinational logic (A-level only) — AQA A-Level Physics

Combinational logic is a fundamental topic in AQA A-Level Physics that deals with digital circuits whose outputs depend solely on the current inputs. Unlike sequential logic, there is no memory or feedback, so the circuit's behaviour is fully described by a truth table. You will study basic logic gates (NOT, AND, OR, NAND, NOR, XOR), learn to construct truth tables for multi-input circuits, and apply Boolean algebra and Karnaugh maps to simplify expressions.

This topic is essential for understanding how digital systems such as processors, calculators and control systems operate. It connects to other areas of physics including semiconductor physics (diodes and transistors used to build gates) and provides a foundation for further study in electronics and computer science. Exam questions often require you to analyse a given circuit, design a circuit from a specification, or simplify a Boolean expression, testing both your logical reasoning and your ability to apply systematic methods.

• →Logic gates: NOT (inverter), AND (output 1 only if all inputs 1), OR (output 1 if any input 1), NAND (inverted AND), NOR (inverted OR), XOR (output 1 if inputs differ).
• →Truth tables: list all possible input combinations (2^n rows for n inputs) and the corresponding output for each combination.
• →Boolean algebra: use rules such as De Morgan's laws (NOT(A AND B) = (NOT A) OR (NOT B)) and precedence (NOT > AND > OR) to simplify expressions.
• →Karnaugh maps: a visual method to simplify Boolean expressions by grouping adjacent 1s in powers of two, using Gray code ordering.
• →Combinational vs sequential logic: combinational outputs depend only on current inputs; sequential outputs depend on past inputs (memory).

• State that Boolean variables take only the values 0 and 1, representing false and true or low and high.
• Construct a truth table with one row for every possible input combination, using 2ⁿ rows for n inputs.
• Derive a Boolean expression from a truth table by writing a product term for each row whose output is 1 and OR-ing those terms.
• Evaluate a given Boolean expression for each input combination to complete or verify a truth table.
• Recognise standard results such as A AND NOT A = 0 and A OR NOT A = 1, and use them to simplify expressions.
• Translate between a truth table, a Boolean expression and an equivalent combination of logic gates.
• Interpret the symbols: a bar denotes NOT, a dot denotes AND and a plus sign denotes OR.
• State the output of each gate: AND gives 1 only for 1,1; OR gives 1 for any 1; NOT inverts; NAND and NOR invert AND and OR outputs; EOR gives 1 when inputs differ.
• Analyse a multi-gate circuit by labelling the output of each gate and combining them stage by stage.
• Construct a truth table for a combined circuit and use it to identify the overall logic function.
• Select and combine gates to realise a required Boolean expression or truth table.
• Recognise that NAND and NOR are inverted forms of AND and OR, and that EOR differs from OR only for the 1,1 input.
• Identify all input combinations for which the required output is 1 and treat each as one product term.
• For each such row, include each input directly if it is 1 and inverted with a NOT gate if it is 0.
• Combine the product terms with OR gates to form the complete expression for the output.
• When deducing a truth table from a circuit, label intermediate gate outputs and evaluate them for every input combination.
• Check the final column against the given truth table and correct any row that does not match.
• Use the same systematic row-by-row method whether constructing a circuit or deducing its behaviour.
• Use the standard truth table of each gate as its definition when analysing or building circuits.
• Treat each gate as a single functional block with defined inputs and outputs.
• Combine gates by connecting the output of one to the input of another to form larger circuits.
• Explain circuit behaviour in terms of gate functions rather than internal electronic components.
• Recognise that questions on internal gate structure are outside the scope of this specification.

• 💡Write inputs in a fixed counting order such as 00, 01, 10, 11 so no combination is missed or duplicated.
• 💡When deriving an expression, label each product term with the row it came from, then combine them with OR signs.
• 💡Check a simplified expression against the original truth table row by row before committing to your final answer.
• 💡Annotate intermediate gate outputs on the diagram before writing the final expression.
• 💡Build the truth table column by column, one gate at a time, so errors are easy to spot.
• 💡For a required function, start from its truth table and choose gates that produce 1 on exactly the needed rows.
• 💡Draw a column for every intermediate gate output so your working can be followed and checked.
• 💡After building or deducing a circuit, test at least one row where the output is 0 as well as rows where it is 1.
• 💡Keep the number of gates minimal where possible, but always prioritise a circuit that matches the truth table exactly.
• 💡Learn the truth tables of all standard gates so you can apply them quickly without deriving them.
• 💡When explaining a circuit, refer to gate names and their input-output behaviour rather than internal structure.
• 💡If a question asks for a circuit, use standard gate symbols and connect them clearly, showing inputs on the left and outputs on the right.
• 💡Always show your working for Boolean simplification, including intermediate steps and the laws used. Even if the final answer is wrong, you can earn method marks.
• 💡When drawing circuits, label all inputs and outputs clearly, and use the correct symbols for each gate. AQA expects standard IEC symbols.
• 💡For truth table questions, write the input combinations in a systematic order (e.g., counting in binary) to avoid missing rows. Double-check the number of rows is 2^n.

• Omitting input combinations from a truth table: for n inputs there must be 2ⁿ rows, so a three-input table needs eight rows, not six.
• Writing a product term for rows where the output is 0; only rows with output 1 contribute to a sum-of-products expression.
• Confusing the order of operations, treating A OR B AND C as (A OR B) AND C; AND binds more tightly than OR unless brackets say otherwise.
• Treating EOR as identical to OR; OR gives 1 for 1,1 but EOR gives 0, so the two differ on that row.
• Forgetting that NAND and NOR invert the whole AND or OR result, not just one input.
• Reading a bar as covering only the nearest variable when it spans a whole expression; a bar over A + B means NOT(A OR B), not (NOT A) OR B.
• Writing a product term for rows where the output is 0 instead of 1; correct this by selecting only the rows whose output is 1.
• Forgetting to invert an input that is 0 in a selected row; correct this by placing a NOT gate on that input in the product term.
• Evaluating a circuit in the wrong order or ignoring gate precedence; correct this by working stage by stage from the inputs towards the output.
• Attempting to describe transistor-level construction of a gate; correct this by describing only the gate's truth table and function.
• Confusing the truth table of one gate with another, such as NAND with NOR; correct this by learning each gate's output for every input combination.
• Treating a gate as having more inputs or outputs than its symbol shows; correct this by using only the inputs and single output defined for that gate.
• Students often think that NAND is the same as AND followed by NOT, but NAND is a single gate with its own truth table; the output is 0 only when all inputs are 1.
• Many believe that Boolean expressions can be simplified by 'cancelling' terms like in algebra, e.g., A AND B OR A AND C = A AND (B OR C) is correct, but A OR A AND B = A is not always obvious; they forget the absorption law.
• Students frequently mislabel Karnaugh map axes, using binary order instead of Gray code, leading to incorrect groupings and unsimplified expressions.

1. 1Day 1-2: Revise the symbols and truth tables of all basic logic gates (NOT, AND, OR, NAND, NOR, XOR). Practice drawing each gate and writing its Boolean expression.
2. 2Day 3-4: Learn to construct truth tables for circuits with up to 4 inputs. Start with simple combinations of two gates, then progress to more complex circuits.
3. 3Day 5-6: Master Boolean algebra rules, especially De Morgan's laws and precedence. Practice simplifying expressions step by step, showing all working.
4. 4Day 7-8: Learn Karnaugh map techniques for 2, 3 and 4 variables. Practice grouping 1s and deriving simplified expressions. Compare with Boolean algebra results.
5. 5Day 9-10: Attempt past paper questions on combinational logic. Focus on circuit design from specifications and simplifying expressions. Review mark schemes to understand examiner expectations.

• 📋Truth table completion: Given a logic circuit diagram, complete a truth table for the output. Advice: systematically work through each input combination, using intermediate columns if helpful.
• 📋Boolean simplification: Simplify a given Boolean expression using algebra or a Karnaugh map. Advice: show all steps and state the laws used; for Karnaugh maps, clearly indicate groupings.
• 📋Circuit design: Design a circuit to meet a given specification (e.g., alarm sounds under certain conditions). Advice: start by writing a truth table, then derive the Boolean expression, simplify, and draw the circuit using standard symbols.
• 📋Analysis of combinational logic: Explain the operation of a given circuit or identify its function (e.g., half-adder). Advice: relate the circuit to its truth table and describe the output for each input combination.